Synapse Design is Hiring Physical Design Engineer/lead


Salary: Not disclosed by recruiter

Industry: Semiconductors/ electronics

Functional area: IT-Software- embedded, EDA, VLSI, ASIC, Chip design

Description:

  • Block level P&R/ sub-system level P&r/Tile level P&R
  •  Candidate must have experience in Cadence or Synopsys and mentor EDA Tools
  • process node experience to be in the range of 40nm & below
  • candidate must be responsible for full chip implementation of complex SoCs

Recruiter Name: Priyanka Agrawal

Contact Company: Synapse Techno Design Innovations Pvt Ltd

Email : anuradha@synapse-da.com

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